Software A-D Conversion Method for Digital Vision Chips.

Software-based Infield Wearout Monitoring for Synchronous Digital Chips

Electronic circuits of all sizes are increasingly used in every aspect of our lives and our dependence on their reliable operation has significantly increased in the past three decades. A mere 7 to 10 year life expectancy, conventionally guaranteed for integrated circuits used in consumer electronics, is not going to be enough for meeting demands of future widespread applications for integrated...

A Digital Error-Averaging Technique for Pipelined A/D Conversion

Capacitor mismatch is the main source of nonlinearity for pipelined analog-to-digital (A/D) converters. Here a digital erroraveraging technique is presented to greatly reduce this effect. Compared to the conventional circuit, the new approach requires only one extra digital addition. This allows a very simple and compact implementation. On the other hand, the conversion speed is halved because ...

Light-adaptive architectures for regularization vision chips

-Light-adaptive algorithms~architectures are proposed for regularization vision chips. The adaptation mechanisms allow the regularization parameters to change in an adaptive manner in accordance with the light intensity of given images. This is achieved by adaptively changing the conductance values associated with massively parallel resistive networks. The algorithms/architectures are inspired ...

Vision Chips or Seeing Silicon

Toward a Software Pipelining Framework for Many-core Chips

Current trends in high performance computing have produced two distinct families of chips. The first one is called complex core, which consists of a few, very architecturally sophisticated cores. The other chip family consists of many simple cores, which lack the advanced features of the complex ones. The two ideological camps have their examples in the current market. The Intel Core Duo family...